China Sic Coated Tray Manufacturers, Suppliers, Factory

The process of silicon carbide substrate is complex and difficult to manufacture. SiC substrate occupies the main value of the industry chain, accounting for 47%. It is expected that with the expansion of production capacity and the improvement of yield in the future, it is expected to drop to 30%.

The fabrication of semiconductor devices primarily encompasses four types of processes: (1) Photolithography (2) Doping Techniques (3) Film Deposition (4) Etching Techniques The specific techniques involved include photolithography, ion implantation, rapid thermal processing (RTP), plasma-enhanced chemical vapor deposition (PECVD), sputtering, and both dry and wet etching methods.

Chemical Vapor Deposition (CVD) refers to a process technology where multiple gaseous reactants at varied partial pressures undergo a chemical reaction under specific temperature and pressure conditions. The resulting solid substance deposits on the surface of the substrate material, thereby obtaining the desired thin film. In traditional integrated circuit manufacturing processes, the obtained thin film materials are generally compounds such as oxides, nitrides, carbides, or materials like polycrystalline silicon, amorphous silicon, etc.

Graphite susceptor is one of the essential parts in the MOCVD equipment, is the carrier and the heater of the wafer substrate. Its properties of thermal stability and thermal uniformity play a decisive role in the quality of wafer epitaxial growth, which directly determines the uniformity and purity of the layer materials, in a result its quality directly affects the preparation of epitaxy.

Within the silicon carbide (SiC) industry chain, substrate suppliers hold significant leverage, primarily due to value distribution. SiC substrates account for 47% of the total value, followed by epitaxial layers at 23%, while device design and manufacturing constitute the remaining 30%. This inverted value chain stems from the high technological barriers inherent to substrate and epitaxial layer production. Three major challenges plague SiC substrate growth: stringent growth conditions, slow growth rates, and demanding crystallographic requirements. These complexities contribute to increased processing difficulty, ultimately resulting in low product yields and high costs. Furthermore, the epitaxial layer’s thickness and doping concentration are critical parameters directly impacting the final device performance.

To achieve the high-quality requirements of IC chip circuit processes with line widths smaller than 0.13μm to 28nm for 300mm diameter silicon polishing wafers, it is essential to minimize contamination from impurities, such as metal ions, on the wafer's surface.