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A P-type silicon carbide (SiC) wafer is a semiconductor substrate that is doped with impurities to create a P-type (positive) conductivity. Silicon carbide is a wide-bandgap semiconductor material that offers exceptional electrical and thermal properties, making it suitable for high-power and high-temperature electronic devices.

Chemical vapor deposition CVD refers to the introduction of two or more gaseous raw materials into a reaction chamber under vacuum and high temperature conditions, where the gaseous raw materials react with each other to form a new material, which is deposited on the wafer surface.

Graphitising is the process of transforming non-graphitic charcoal into graphitic charcoal with graphite three-dimensional regular ordered structure by high-temperature heat treatment, making full use of electrical resistance heat to heat the charcoal material to 2300~3000 ℃, and transforming the charcoal with amorphous chaotic layer structure into ordered graphite crystalline structure.

Silicon carbide (SiC) power devices are semiconductor devices made of silicon carbide materials, mainly used in high-frequency, high-temperature, high-voltage and high-power electronic applications. Compared with traditional silicon (Si)-based power devices, silicon carbide power devices have higher bandgap width, higher critical breakdown electric field, higher thermal conductivity and higher saturated electron drift velocity, which makes them have great development potential and application value in the field of power electronics.

Within the silicon carbide (SiC) industry chain, substrate suppliers hold significant leverage, primarily due to value distribution. SiC substrates account for 47% of the total value, followed by epitaxial layers at 23%, while device design and manufacturing constitute the remaining 30%. This inverted value chain stems from the high technological barriers inherent to substrate and epitaxial layer production. Three major challenges plague SiC substrate growth: stringent growth conditions, slow growth rates, and demanding crystallographic requirements. These complexities contribute to increased processing difficulty, ultimately resulting in low product yields and high costs. Furthermore, the epitaxial layer’s thickness and doping concentration are critical parameters directly impacting the final device performance.

Homoepitaxy and heteroepitaxy play pivotal roles in material science. Homoepitaxy involves the growth of a crystalline layer on a substrate of the same material, ensuring minimal defects due to perfect lattice matching. In contrast, heteroepitaxy grows a crystalline layer on a different material substrate, which can lead to challenges like lattice mismatch. These processes are crucial in advancing semiconductor devices and thin films. For instance, heteroepitaxy significantly impacts microelectronics and quantum optics, contributing to innovations like Light Emitting Diodes.