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The basic crystal unit cell of monocrystalline silicon is the zinc blende structure, in which each silicon atom bonds chemically with four neighboring silicon atoms. This structure is also found in monocrystalline carbon diamonds.

Currently, many semiconductor devices employ mesa device structures, which are predominantly created through two types of etching: wet etching and dry etching. While the simple and rapid wet etching plays a significant role in semiconductor device fabrication, it has inherent drawbacks such as isotropic etching and poor uniformity, which result in limited control when transferring small-sized patterns. Dry etching, however, with its high anisotropy, good uniformity, and repeatability, has become prominent in semiconductor device fabrication processes. The term “dry etching” broadly refers to any non-wet etching technology used for removing surface materials and transferring micro and nano patterns, including laser etching, plasma etching, and chemical vapor etching. The dry etching discussed in this text specifically pertains to the narrow application of processes using plasma discharge—either physical or chemical—to modify material surfaces.

SiC substrate can have microscopic defects, such as Threading Screw Dislocation (TSD), Threading Edge Dislocation (TED), Base Plane Dislocation (BPD), and others. These defects are caused by deviations in the arrangement of atoms at the atomic level. SiC crystals may also have macroscopic dislocations, like Si or C inclusions, micropipe, hexagonal voids, polymorphs, etc. These dislocations are typically large in size.

At first glance, quartz (SiO2) material looks very similar to glass, but what is special is that ordinary glass is composed of many components (such as quartz sand, borax, boric acid, barite, barium carbonate, limestone, feldspar, soda ash, etc.), while quartz only contains SiO2, and its microstructure is a simple network composed of silicon dioxide tetrahedral structural units.

The Silicon Carbide (SiC) production process encompasses the preparation of substrate and epitaxy from the materials side, followed by chip design and manufacturing, device packaging, and finally, distribution to downstream application markets. Among these stages, substrate material processing is the most challenging aspect of the SiC industry. SiC substrates are both hard and brittle, making cutting, grinding, and polishing extremely difficult. This increases the likelihood of defects during processing and reduces the yield rate. Currently, major international SiC manufacturers are planning to transition from 6-inch to 8-inch SiC wafers. Overcoming the challenges associated with 8-inch substrates has become a critical benchmark for the SiC industry. This article will introduce the key parameters of SiC substrates.

​As the world searches for new opportunities in the semiconductor field, Gallium Nitride (GaN) continues to stand out as a potential candidate for future power and RF applications. However, despite its numerous benefits, GaN faces a significant challenge: the absence of P-type products. Why is GaN hailed as the next major semiconductor material, why is the lack of P-type GaN devices a critical drawback, and what does this mean for future designs?