China pss etching Manufacturers, Suppliers, Factory

Currently, many semiconductor devices employ mesa device structures, which are predominantly created through two types of etching: wet etching and dry etching. While the simple and rapid wet etching plays a significant role in semiconductor device fabrication, it has inherent drawbacks such as isotropic etching and poor uniformity, which result in limited control when transferring small-sized patterns. Dry etching, however, with its high anisotropy, good uniformity, and repeatability, has become prominent in semiconductor device fabrication processes. The term “dry etching” broadly refers to any non-wet etching technology used for removing surface materials and transferring micro and nano patterns, including laser etching, plasma etching, and chemical vapor etching. The dry etching discussed in this text specifically pertains to the narrow application of processes using plasma discharge—either physical or chemical—to modify material surfaces.

4H-SiC, as a third-generation semiconductor material, is renowned for its wide bandgap, high thermal conductivity, and excellent chemical and thermal stability, making it highly valuable in high-power and high-frequency applications.

In semiconductor fabrication, etching is one of the major steps, along with photolithography and thin-film deposition. It involves removing unwanted materials from the surface of a wafer using chemical or physical methods. This step is carried out after coating, photolithography, and developing. It is used to remove the exposed thin film material, leaving only the desired portion of the wafer, and then removing the excess photoresist. These steps are repeated numerous times to create complex integrated circuits.

Recently, our company announced that the company has successfully developed a 6-inch Gallium Oxide single crystal using the casting method, becoming the first domestic industrialized company to master the 6-inch Gallium Oxide single crystal substrate preparation technology.

In the high voltage field, particularly for high-voltage devices above 20,000V, the SiC epitaxial technology still faces several challenges. One of the main difficulties is achieving high uniformity, thickness, and doping concentration in the epitaxial layer. For the fabrication of such high-voltage devices, a 200um thick silicon carbide epitaxial wafer with excellent uniformity and concentration is required.