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We know that further epitaxial layers need to be built on top of some wafer substrates for device fabrication, typically LED light-emitting devices, which require GaAs epitaxial layers on top of silicon substrates; SiC epitaxial layers are grown on top of conductive SiC substrates for building devices such as SBDs, MOSFETs, etc. for high voltage, high current and other power applications; GaN epitaxial layers are built on top of semi-insulating SiC substrates for building HEMTs and other RF applications.

In November 2023, Semicorex released 850V GaN-on-Si epitaxial products for high-voltage, high-current HEMT power device applications. Compared to other substrates for HMET power devices, GaN-on-Si enables larger wafer sizes and more diversified applications, and it can also be quickly introduced into the mainstream silicon chip process in fabs, which is a unique advantage for improving the yield of power devices.

Silicon Carbide (SiC) has emerged as a key material in the field of semiconductor technology, offering exceptional properties that make it highly desirable for various electronic and optoelectronic applications. The production of high-quality SiC single crystals is crucial for advancing the capabilities of devices such as power electronics, LEDs, and high-frequency devices. In this article, we delve into the significance of porous graphite in the Physical Vapor Transport (PVT) method for 4H-SiC single crystal growth.

Silicon carbide (SiC) is a material that possesses exceptional thermal, physical and chemical stability, exhibiting properties that go beyond those of conventional materials. Its thermal conductivity is an astonishing 84W/(m·K), which is not only higher than copper but also three times that of silicon. This demonstrates its enormous potential for use in thermal management applications.

Within the silicon carbide (SiC) industry chain, substrate suppliers hold significant leverage, primarily due to value distribution. SiC substrates account for 47% of the total value, followed by epitaxial layers at 23%, while device design and manufacturing constitute the remaining 30%. This inverted value chain stems from the high technological barriers inherent to substrate and epitaxial layer production. Three major challenges plague SiC substrate growth: stringent growth conditions, slow growth rates, and demanding crystallographic requirements. These complexities contribute to increased processing difficulty, ultimately resulting in low product yields and high costs. Furthermore, the epitaxial layer’s thickness and doping concentration are critical parameters directly impacting the final device performance.

SOI(Silicon-On-Insulator) substrate is structure in which a silicon oxide (SiO2) insulating layer is introduced between a top silicon layer and a silicon substrate, and integrated circuits are fabricated on the top silicon thin layer. This technology of using SOI materials to manufacture integrated circuits is called SOI technology.