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As a wide-bandgap (WBG) semiconductor material, SiC's wider energy difference gives it higher thermal and electronic properties compared to traditional Si. This feature enables power devices to operate at higher temperatures, frequencies and voltages.

The development of high-powered blue and UV LEDs has enabled the creation of full-color LED TV displays, as well as white LED automotive and domestic lighting. These LEDs are based on Gallium Nitride, which is deposited on substrate wafers supported by CVD SiC-coated graphite susceptor using the MOCVD process.

The Silicon Carbide (SiC) production process encompasses the preparation of substrate and epitaxy from the materials side, followed by chip design and manufacturing, device packaging, and finally, distribution to downstream application markets. Among these stages, substrate material processing is the most challenging aspect of the SiC industry. SiC substrates are both hard and brittle, making cutting, grinding, and polishing extremely difficult. This increases the likelihood of defects during processing and reduces the yield rate. Currently, major international SiC manufacturers are planning to transition from 6-inch to 8-inch SiC wafers. Overcoming the challenges associated with 8-inch substrates has become a critical benchmark for the SiC industry. This article will introduce the key parameters of SiC substrates.

Homoepitaxy and heteroepitaxy play pivotal roles in material science. Homoepitaxy involves the growth of a crystalline layer on a substrate of the same material, ensuring minimal defects due to perfect lattice matching. In contrast, heteroepitaxy grows a crystalline layer on a different material substrate, which can lead to challenges like lattice mismatch. These processes are crucial in advancing semiconductor devices and thin films. For instance, heteroepitaxy significantly impacts microelectronics and quantum optics, contributing to innovations like Light Emitting Diodes.

Taiwan's Power Semiconductor Manufacturing Corporation (PSMC) has announced plans to build a 300mm wafer fab in Japan in collaboration with SBI Holdings. The purpose of this collaboration is to strengthen Japan's domestic IC (integrated circuit) supply chain, with a particular focus on circuits for AI edge computing and packaging technologies.