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4 Inch High Purity Semi-Insulating HPSI SiC Double-side Polished Wafer Substrate

Semicorex provides various types of 4H and 6H SiC wafers. We have been manufacturer and supplier of wafer substrates for many years. Our 4 Inch High Purity Semi-Insulating HPSI SiC Double-side Polished Wafer Substrate has a good price advantage and cover most of the European and American markets. We look forward to becoming your long-term partner in China.

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Product Description

Semicorex has a complete silicon carbide(SiC) wafer products line, including 4H and 6H substrates with N-type, P-type and high purity semi-insulating wafers, they can be with or without epitaxy.

Introducing our cutting-edge 4 Inch High Purity Semi-Insulating HPSI SiC Double-side Polished Wafer Substrate, a top-of-the-line product that is designed to meet the demanding requirements of advanced electronic and semiconductor applications.

4 Inch High Purity Semi-Insulating HPSI SiC Double-side Polished Wafer Substrate is mainly used in 5G communications, radar systems, guidance heads, satellite communications, warplanes and other fields, with the advantages of enhancing the RF range, ultra-long-range identification, anti-jamming and high-speed, high-capacity information transfer and other applications, is considered the most ideal substrate for making microwave power devices.

Specifications:

● Diameter: 4″

● Double-polished

●l Grade: Production, Research, Dummy

● 4H-SiC HPSI Wafer

● Thickness: 500±25 μm

●l Micropipe Density: ≤1 ea/cm² ~ ≤10 ea/cm²

Items	Production	Research	Dummy
Crystal Parameters
Polytype	4H
Surface orientation on-axis	<0001 >
Surface orientation off-axis	0±0.2°
(0004)FWHM	≤45arcsec	≤60arcsec	≤1OOarcsec
Electrical Parameters
Type	HPSI
Resistivity	≥1 E9ohm·cm	100% area > 1 E5ohm·cm	70% area > 1 E5ohm·cm
Mechanical Parameters
Diameter	99.5 - 100mm
Thickness	500±25 μm
Primary flat orientation	[1-100]±5°
Primary flat length	32.5±1.5mm
Secondary flat position	90° CW from primary flat ±5°. silicon face up
Secondary flat length	18±1.5mm
TTV	≤5 μm	≤10 μm	≤20 μm
LTV	≤2 μm(5mm*5mm)	≤5 μm(5mm*5mm)	NA
Bow	-15μm ~ 15μm	-35μm ~ 35μm	-45μm ~ 45μm
Warp	≤20 μm	≤45 μm	≤50 μm
Front(Si-face) roughness(AFM)	Ra≤0.2nm (5μm*5μm)
Structure
Micropipe density	≤1 ea/cm²	≤5 ea/cm²	≤10 ea/cm²
Carbon inclusion density	≤1 ea/cm²	NA
Hexagonal void	None	NA
Metal impurities	≤5E12atoms/cm²		NA
Front Quality
Front	Si
Surface finish	Si-face CMP
Particles	≤60ea/wafer (size≥0.3μm)	NA
Scratches	≤2ea/mm. Cumulative length ≤Diameter	Cumulative length≤2*Diameter	NA
Orange peel/pits/stains/striations/ cracks/contamination	None		NA
Edge chips/indents/fracture/hex plates	None
Polytype areas	None	Cumulative area≤20%	Cumulative area≤30%
Front laser marking	None
Back Quality
Back finish	C-face CMP
Scratches	≤5ea/mm,Cumulative length≤2*Diameter	NA
Back defects (edge chips/indents)	None
Back roughness	Ra≤0.2nm (5μm*5μm)
Back laser marking	1 mm (from top edge)
Edge
Edge	Chamfer
Packaging
Packaging	The inner bag is filled with nitrogen and the outer bag is vacuumed. Multi-wafer cassette, epi-ready.
*Notes： "NA" means no request Items not mentioned may refer to SEMI-STD.

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