Taiwan's PSMC to Build 300mm Wafer Fab in Japan

Taiwan's Power Semiconductor Manufacturing Corporation (PSMC) has announced plans to build a 300mm wafer fab in Japan in collaboration with SBI Holdings. The purpose of this collaboration is to strengthen Japan's domestic IC (integrated circuit) supply chain, with a particular focus on circuits for AI edge computing and packaging technologies.

The new facility will be responsible for developing process technologies such as 22nm and 28nm, as well as higher process nodes. Additionally, it will work on wafer-on-wafer 3D stacking technology, which is a technique used to vertically integrate multiple chips or dies to enhance performance and density.

To facilitate the construction of the wafer fab in Japan, a preparatory company will be formed by PSMC and SBI Holdings. It is reported that manufacturing operations could commence approximately two years after the construction starts. As part of the Japanese government's initiatives to revitalize its chip industry, PSMC may receive up to 40 percent of the building costs for its wafer fab.

This development aligns with Japan's efforts to boost its semiconductor sector. The government has pledged around US$2.8 billion to support TSMC (Taiwan Semiconductor Manufacturing Company) in establishing a wafer fab in Kumamoto prefecture, specifically to supply Sony Corp. and automotive chip company Denso Corp. Additionally, the Japanese government is providing funding to startup Rapidus, in collaboration with IBM, to produce cutting-edge logic chips.

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